Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Product List
DDR3 DRAM with ECC Slide 6

It is helpful to review a simplified diagram of how the Error Correcting Code works. ECC in DRAMs is usually done during Writes and Reads. In the upper half, on the left side, a set of data needs to be stored. The original data will be analyzed by an ECC formula, and a set of unique, corresponding bits will be determined. Then both the encoded ECC bits, and the original data are stored in the DRAM at the same time. In the lower half, on the left side, the original data and the ECC bits are output from memory. An ECC checking algorithm decodes the ECC bits, and compares them to the retrieved original data. If the original data had changed after it had been stored, the ECC checking algorithm will detect the changes, and correct the original data to what it was supposed to be. The higher in number of the ECC bits that are stored and used, the better will be the error correcting ability of the ECC algorithm during the Data Read.

PTM Published on: 2016-10-06