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DC-DC Conversion Cookbook Slide 6

In a step down switching regulator the power elements SW1 and SW2, high side and low side, are used in the switching mode (this is why it is called a switching converter) either fully turned on or fully off. The operation sequence is to close the high side switch for a time (Ton) and open it for a time (Toff) at a switching period (T). When the high side is on, the low side is off and vice versa. This is performed with a periodic drive signal from the PWM block to the gate of the two switches. The frequency of repetition (1/T) is the switching frequency of the converter. In a PWM converter the switching frequency is constant. The fraction of the period for which the HS is on is called duty cycle (D) which is equal to Ton divided by T. At the beginning of each clock cycle the PWM block turns the HS MOSFET switch on, the inductor current ramps up, and the output voltage increases. The low side is off and no current flows through it. The current on the inductor is the same as the current that flows through the HS. The voltage on the switching node is Vcc, assuming no losses that is zero resistance across the high side when it is on. When the control logic turns the HS switch off, the LS MOSFET is turned on and the switching node between HS and LS goes to zero (actually slightly below ground) after a dead time period to prevent current shoot-through; both the HS and LS can not be conducting at the same time. Since the inductor current cannot change instantaneously, the current on the inductor will be the same as the one that had been flowing through the high side just prior its opening. The inductor current ramps down flowing through the LS to the load. The next cycle is initiated by the clock signal turning off the LS rectifier, and turning on the HS switch. The LC filter works as a low pass filter, so that the output is an average of the voltage on the switching node that is always Vcc or zero. In other words the PWM comparator modulates the power transferred to the load and it can be demonstrated that the output voltage varies linearly with the input voltage by the duty cycle D as shown in the formula.

PTM Published on: 2013-04-11