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buffer zero
Skyworks Solutions introduced a family of PCIe Gen4 buffers specifically targeting customers using Intel Xeon CPU platforms primarily for server, storage, and datacenters. This family of products is slightly differentiated from the existing portfolio, because to participate in this business one has to be an approved supplier by Intel. Intel writes the specifications, which they refer to as white-cover or yellow-book. End customers will only use these devices if they have been approved by Intel. The Si5315x PCIe Clock Buffer products are a family of off-the-shelf solutions that provide either 2, 4, 6, or 9 PCIe Gen 1/2/3 compliant HCSL outputs per device. The Si5315x PCIe clock buffer family carries over all the features from Skyworks Solutions Si5214x clock generator family. These are non-PLL based buffers, which further reduce power consumption. No terminations are required on the input or output. For ease-of-use, output enable control pins are provided for better power management by enabling or disabling each output. The Si5315x clock buffer family supports the fanout of an externally provided HCSL or LVCMOS input clock with frequencies up to 200 MHz. An example of the Si53154 quad PCIe outputs is shown here. The clock buffer products provide an I²C interface that allows signal integrity tuning of clock edge rates and skew for the differential true and compliment outputs.
PTM Published on: 2017-04-27