Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Slide 23 Product List
si5330x
The Si53302 will accept a wide range of input clock formats and can then be configured to output any format. The clock input can accommodate CMOS, LVDS, CML, LVPECL, and HCSL formats, and each input can be up to 10 different outputs in frequency. The output format is pin-configurable and independent of any input format. In fact, each bank of five differential outputs can be different formats. Each output bank has its own voltage supply pin, and so will perform level translation between 1.8, 2.5, and 3.3 V. This means that not only can fewer buffer ICs be used in a clock tree, but the designer can qualify and maintain fewer buffer ICs across all of the designs.
PTM Published on: 2017-04-27