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Understanding SWIFT Step-Down DC-DC Converters Slide 4

A typical block diagram for a step down, or buck regulator topology is shown. The main components are Q1, the top side power MOSFET; L1, the inductor; and C1, the output capacitor. For a synchronous buck topology, Q2, the low side MOSFET is used. In a non-synchronous buck topology, a power diode D1 is used. A synchronous buck converter will have higher efficiency than a non-synchronous buck converter with equal top side MOSFET resistance. When the MOSFET Q2 is conducting, the voltage drop is less than the diode D1, almost by 0.5 V in many cases. When current flows through the MOSET or Diode, the lower voltage will dissipate less power. For example, at 1 A, the MOSFET will dissipate 300 mW (0.3 V drop times 1 A), and the diode will dissipate 700 mW (0.7 V drop times 1 A). During lower duty cycles when the low side MOSFET or diode is conducting most of the time, the synchronous buck converter’s higher efficiency will be more pronounced due to the higher voltage drop. On the other hand, a synchronous buck converter is more complex and care has to be taken to make sure that both MOSFETs do not turn on during the same time cycle. This causes shoot-thru current, which can reduce the efficiency. Synchronous buck converters employ a dead time scheme to ensure that the top and low side MOSFETs are never on at the same time. Note that the power diode is not integrated, but the low side power MOSFET is often integrated. A diode integrated within the package would hamper the package power dissipation performance of the power supply.

PTM Published on: 2011-11-10