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In SPI Mode, the command, address, and data are input and read from 1 pin, this is noted as 1-1-1. This notation specifies the number of channels for the command, followed by the number of channels for the address, and then the number of channels for data. In extended-SPI modes, data throughput is increased by reading data on 2 or 4 pins, also noted as 1-1-2 or 1-1-4. Multi-I/O SPI, decreases overhead further by reading address data on 2 or 4 pins. QPI mode further reduces overhead by utilizing all four pins for command, address, and data input. Finally, DTR SPI, which stands for dual transfer rate SPI, adds dual edge clocking for increased throughput in systems with slower clock speeds. All Quad SPI and QPI products from ISSI support legacy SPI commands for compatibility.
