Is There a Future for 8-Bit MCUs?

作者:John Donovan

投稿人:电子产品


With more and more embedded designs migrating to inexpensive 32-bit MCUs, is there any point in starting a new project using an 8-bit architecture that dates back to the 1970s?

8- versus 32-bit wars

Two Silicon Labs engineers recently invited me to lunch to hear my views on “the 8- versus 32-bit wars.” Now you might be thinking (as I was) that this argument was over long ago. I figured 32-bit processors have gotten so energy efficient and cheap that it is about time to stop talking about using the 35 year-old 8-bit 8051 architecture for new designs. Still, on principle I never turn down a free lunch so I accepted the invitation. It turned out to be a discussion worth having.

Faster or smaller?

The primary argument for going to 32 bits is processing speed. A 32-bit MCU can process instructions quickly, enabling CPUs to wake up from a low-power sleep mode, crunch and transmit data, and go back to sleep ASAP. The time spent in active mode is minimized, therefore minimizing overall energy consumption.

Modern 32-bit MCUs typically use a pipelined architecture, enabling them to fetch, store, and execute multiple instructions simultaneously; whereas legacy 8-bit 8051s may require multiple clock cycles to execute one instruction. While they can be scaled back, 32-bit MCUs typically operate at high speed in run mode (32 to 100 MHz) while their 8-bit counterparts are slogging along at 4 MHz, or even at the speed of the real-time clock (32.768 kHz). Even if they do not always take full advantage of it, 32-bit MCUs are all about speed. For computationally intensive applications, they are the way to go.

The counter argument is that while an 8-bit MCU will take longer to process the same data, there are a lot fewer leaky transistors involved, thanks in part to utilizing a less aggressive process node, which leads to lower static power. For low-power sensor-based applications that do not involve a lot of number crunching, just waking up periodically to check for sensor input and taking a simple action based on it, 8-bit MCUs have a more attractive power profile.

Of course, it is not quite that simple. One of the most popular low-power 32-bit processor cores for embedded applications is the ARM® Cortex™-M0/M0+. The Cortex camp advances some additional arguments aimed at the purported shortcomings of 8051-based MCUs:
  • 8-bit processors do not support analog/mixed-signal applications without a significant increase in code size and clock frequency, thereby increasing power.
  • The ARM Cortex-M0 has a C-friendly architecture. You can write the whole application using exception handlers in C without resorting to assembler. Try that with an 8051.
  • Access up to 4 Gbytes of linear memory address space which eliminates the need for memory paging that is required in most 8-bit processors.
Needless to say, the SiLabs engineers did not take that lying down. Neither did their colleagues at NXP, Maxim, Atmel, or Microchip, all of whom make highly-efficient 8-bit MCUs that address the shortcomings of older-generation 8051s.

Not your dad’s 8051

Silicon Labs’ C8051F850-B-GU (Figure 1) is a low-cost, high-performance 8-bit MCU optimized for motor control. While the SiLabs CIP-51 μC core is fully compatible with the standard 8051 instruction set, it incorporates a pipelined architecture that enables 70 percent of instructions to execute in one to two clock cycles. In addition to 512 Kbytes of RAM and 8 Kbytes of memory, the chip surrounds the 8051 core with numerous digital and analog peripherals, including a 12-bit, 16-channel 200 ksample/s SAR ADC; two analog comparators with programmable hysteresis and response time; four 16-bit timers; multiple communications channels (I²C, SPI, UART); and a 16-bit, three-channel programmable counter array (PCA). The PCA can support three independent PWM channels with built-in overcurrent/fault protection, targeting motor control, and power-supply applications. Running at 25 MHz, the 8051F850 MCUs deliver up to 25 MIPS performance, drawing 4.45 mA when running flat-out down to 105 μA in stop mode (core halted, all clocks stopped, internal LDO on).

Silicon Labs C8051F85x/86x

Figure 1: C8051F85x/86x block diagram (Courtesy of Silicon Labs). 

SiLabs’ 8051F850 does seem (as SiLabs engineers claim) to have dodged the first objection listed above, namely a problem efficiently handling analog/mixed-signal applications. As for not being C friendly, SiLabs provides a complementary Keil PK51 Professional Development Kit for its 8-bit MCUs that addresses that issue. While not able to address a huge linear address space, something you cannot do with an 8-bit MCU, with 512 Kbytes of RAM memory paging is not likely to be a problem in the motor control applications for which the 8051F850 is designed. For those wishing to further evaluate the chip, DigiKey stocks the C8051F850-B-DK Development Kit.

While a decidedly ARM-friendly shop, NXP has upgraded the original 8051 core in its P89LPC915/916/917 MCUs. The P89LPC915/916/917 are single-chip microcontrollers, available in low-cost packages; they include 2 Kbytes of Flash memory, 256 bytes of RAM, a four-input multiplexed 8-bit ADC, an 8-bit DAC, and two analog comparators with selectable reference. A high-performance 80C51 CPU provides instruction cycle times of 111 to 222 ns for all instructions except multiply and divide when executing at 18 MHz, six times the performance of the standard 80C51 running at the same clock frequency.

Many system-level functions have been incorporated into the P89LPC915/916/917 in order to reduce component count, board space, and system cost. The P89LPC915/916/917s operate at 18 MHz and draw 11 mA (VDD = 3.6 V) in run mode and 45 μA in power-down mode.

The Maxim 73S1215F uses an enhanced 8051 core that performs most instructions in one clock cycle. While its feature and instruction set are 8051 compatible, the 80515 architecture eliminates redundant bus states and implements parallel execution of fetch and execution phases. Normally, a machine cycle is aligned with a memory fetch; therefore, most single-byte instructions are performed in a single clock cycle. This leads to an eight times average performance improvement over a traditional 8051 device running at the same clock frequency.

Intended for smart-card reader and e-banking applications, the 24 MHz Maxim 73S1215F includes a full-speed (12 Mbps) USB 2.0 interface in addition to I²C, buffers for bulk in/out, and a 115 kbps UART. The MCU’s 20 MIPS performance meets the requirements of various encryption needs such as AES, DES/3-DES, and even RSA (for PIN encryption).

While fully 8051-compatible, the Atmel AT89C4051 incorporates an 8-bit core with 4 Kbytes of reprogrammable Flash memory, 128 bytes of RAM, 15 I/O lines, two 16-bit timer/counters, a five-vector, two-level interrupt architecture, a full duplex serial port, a precision analog comparator, on-chip oscillator, and clock circuitry. Running at 24 MHz the AT89C4051 in active mode draws 5.5 mA (VCC = 3 V); in power-down mode 5 μA (VCC=3 V, RTC off, RAM retention). Atmel positions the AT89C4051 as a flexible, cost-effective solution for a wide range of embedded applications.

Beyond the 8051

Not all 8-bit MCUs are constrained by an 8051 heritage. While Atmel has a line of C51-based MCUs, not to mention ARM-based ones, Atmel’s AVR core features a Harvard architecture, 32 8-bit general-purpose registers, a single-cycle ALU, a 16-bit stack pointer, and a 22-bit program counter.

Atmel’s tinyAVR® line of 8-bit MCUs is based on Atmel’s AVR-enhanced RISC architecture. TinyAVRs provide a high level of integration in low pin count (6-32 pin), small memory (1 to 8 Kbyte Flash) devices. The ATtiny13A is decidedly tiny, with only 1 Kbyte of Flash memory, 64 bytes of EEPROM, and 64 bytes of SRAM in a 1.4 x 1.5 mm 8-pin PDIP package. It manages to incorporate a four-channel, 10-bit ADC with internal voltage reference; an analog comparator; a programmable watchdog timer; and programmable watchdog timer and brownout detectors. While capable of running at up to 20 MHz, the ATtiny13A running at 1 MHz draws 190 μA in active mode (1.8 V) and 24 μA in idle mode. Programs can be developed in C or assembly using the Atmel Studio IDE.

While still maintaining the same 8-bit RISC architecture of the tinyAVR line, Atmel’s megaAVR® MCUs (Figure 2) add considerably more memory and connectivity options. The ATmega88A features 8 Kbytes of Flash memory, 1 Kbyte of SRAM, 23 general-purpose I/O lines, 32 general-purpose working registers, three flexible timer/counters with compare modes, internal and external interrupts, serial-programmable USART, a byte-oriented 2-wire serial interface, SPI serial port, 6-channel 10-bit A/D converter (8-channels in TQFP and QFN/MLF packages), a programmable watchdog timer with internal oscillator, and five software-selectable power-saving modes. Operating at 20 MHz, the ATmega88A delivers 20 MIPS throughput while drawing 0.2 mA in active mode (1 MHz, 1.8 V) and 0.75 μA in power-save mode (RTC on, data retention).

Atmel megaAVR CPU

Figure 2: The megaAVR CPU and peripherals (Courtesy of Atmel). 

Finally, Microchip offers a wide range of 8-bit PIC MCUs from the low-end PIC10F200 (8-bit data, 12-bit instruction); to the midrange PIC12F and PIC16F (8-bit data, 14-bit instruction); and the high-end PIC18F4550 (8-bit data, 16-bit instruction). Table 1 summarizes the differences in the various product lines.

Microchip 8-bit PIC MCU architectures

Table 1: Microchip 8-bit PIC MCU architectures (Courtesy of Microchip). 

Microchip’s ongoing investment in its extensive 8-bit product lines, not to mention Atmel and Silicon Labs’, indicates that there is more going on than trying to hang on to customers with legacy 8-bit designs. When modern 8-bit processor cores are surrounded by plenty of high-speed peripherals, there are applications where an inexpensive, “good enough” MCU is more appropriate than even a powered-down 32-bit MCU, especially when future designs can be scaled up and still be software compatible with legacy code. Software compatibility alone makes switching to another architecture that much less attractive.

Summary

The 32- versus 8-bit war is far from over, though each architecture has an application space where it is a better choice. For compute-intensive applications, assembling and transmitting data packets, for example, 32-bit MCUs have a distinct advantage. On the other hand, for low-power sensor-based applications that do not involve a lot of number crunching, just waking up periodically to check for sensor input and making a decision based on it, 8-bit MCUs are a logical choice.

The bottom line is that the current crop of 8-bit MCUs goes a long way toward addressing issues of speed, latency, address space, and programmability that characterized the original 8051 architecture. The latest 8-bit MCUs surround the processor core with a host of high-speed peripherals that make them serious contenders for a wide range of embedded designs. There are indeed applications where their size and feature set make them a logical choice versus the 32-bit alternatives.

For more information on the parts discussed in this article, use the links provided to access product pages on the DigiKey website.
 

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关于此作者

John Donovan

John Donovan 是《Low-Power Design》编辑、出版人,《Portable Design》前主编和《 EDN 亚洲》总编。 John 在过去 25 年中出版了两本书和许多手册,发表了数百篇技术文章。 他在担任微波技术员期间,以半工半读的方式在加州大学伯克利分校获得英国文学学士学位,并在旧金山州立大学获得 MBA 学位。 他是计算机协会 (ACM) 会员,IEEE 高级会员。

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